1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more particularly to a method for fabricating a semiconductor device, which allows the short-channel effect and refresh property of the semiconductor device to be improved.
2. Description of the Prior Art
In a fabricating method of a semiconductor device according to the prior art, a gate line is first formed on a silicon substrate where a cell region and a peripheral region are defined. Then, the entire upper portion of the resulting substrate is subjected to an oxidation process to form an oxide film thereon. Next, lightly doped drain (LDD) regions are formed in the silicon substrate at both sides of the gate line by an ion implantation process, and then, a buffer oxide film and a nitride film are deposited on the substrate to a small thickness. Thereafter, N-type junctions are formed in the silicon substrate at both sides of the gate line by an ion implantation process, and in order to secure the space between the gate line and a plug, a spacer nitride film is then deposited on the substrate.
Furthermore, in order to increase the current of the cell region, a polysilicon layer for plugs is deposited to form plugs, and then the resulting substrate is subjected to a high temperature rapid thermal annealing (RTA) process.
In such a prior art, as a semiconductor device becomes fine, the space between the gate lines and the N-type junctions is reduced. Thus, there is a problem in that the short channel margin between a source region and a drain region becomes insufficient.
Another problem is that the gradual effect between the channel region and the junction region is reduced due to out-diffusion effect caused by the RTA process to increase electric field and thus gate-induced drain leakage (GIDL) current, thereby deteriorating refresh property. Also, LtRAS failure rate in a probe test is increased to reduce yield.